MARC details
| 000 -LEADER |
|---|
| fixed length control field |
02254cam a2200433 i 4500 |
| 001 - CONTROL NUMBER |
|---|
| control field |
15141403 |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
|---|
| control field |
20210317142727.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
080114s2009 nyua 001 0 eng |
| 010 ## - LIBRARY OF CONGRESS CONTROL NUMBER |
|---|
| LC control number |
2008001634 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9780073529530 (hbk. : alk. paper) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
0073529532 (hbk. : alk. paper) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9780071287654 (pbk.) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
0071287655 (pbk.) |
| 040 ## - CATALOGING SOURCE |
|---|
| Original cataloging agency |
DLC |
| Transcribing agency |
DLC |
| Modifying agency |
UKM |
| -- |
BTCTA |
| -- |
YDXCP |
| -- |
BAKER |
| -- |
BWX |
| -- |
COD |
| -- |
IXA |
| -- |
DLC |
| Description conventions |
rda |
| 050 00 - LIBRARY OF CONGRESS CALL NUMBER |
|---|
| Classification number |
TK7888.4 |
| Item number |
.B76 2008 |
| 082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
621.395 |
| Edition number |
22 |
| Item number |
B.S.F |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
Brown, Stephen D. |
| 9 (RLIN) |
26017 |
| Relator term |
author. |
| 245 10 - TITLE STATEMENT |
|---|
| Title |
Fundamentals of digital logic with VHDL design / |
| Statement of responsibility, etc |
Stephen Brown and Zvonko Vranesic. |
| 250 ## - EDITION STATEMENT |
|---|
| Edition statement |
Third edition |
| 264 #1 - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
|---|
| Place of publication, distribution, etc |
New York, NY : |
| Name of publisher, distributor, etc |
McGraw-Hill, |
| Date of publication, distribution, etc |
[2009] |
| 264 #4 - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
|---|
| Date of publication, distribution, etc |
©2009 |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
xx, 939 pages : |
| Other physical details |
illustrations (some color) ; |
| Dimensions |
24 cm + |
| Accompanying material |
1 computer disc (4 3/4 in.) |
| 336 ## - CONTENT TYPE |
|---|
| Source |
rdacontent |
| Content type term |
text |
| 337 ## - MEDIA TYPE |
|---|
| Source |
rdamedia |
| Media type term |
unmediated |
| 338 ## - CARRIER TYPE |
|---|
| Source |
rdacarrier |
| Carrier type term |
volume |
| 490 0# - SERIES STATEMENT |
|---|
| Series statement |
McGraw-Hill series in electrical and computer engineering |
| 500 ## - GENERAL NOTE |
|---|
| General note |
Includes index. |
| 500 ## - GENERAL NOTE |
|---|
| General note |
Accompanying CD-ROM contains Altera's Quartus II CAD system and all VHDL examples presented in the book. |
| 505 0# - FORMATTED CONTENTS NOTE |
|---|
| Formatted contents note |
Design concepts --<br/>Introduction to logic circuits --<br/>Implementation technoloogy --<br/>Optimized implementation of logic functions --<br/>Number representation and arithmetic circuits --<br/>Combinational-circuit building blocks --<br/>Flip-flops, registers, counters, and a simple processor --<br/>Synchronous sequentialo circuits --<br/>Asynchronous sequential circuits --<br/>Digital system design --<br/>Testing of logic circuits --<br/>Computer aided design tools. |
| 538 ## - SYSTEM DETAILS NOTE |
|---|
| System details note |
Minimum system requirements (PC): Pentium III processor or later; Windows XP or later; USB port for connecting a USB-Blaster; TCP/IP networking protocol installed; Internet Explorer 6.0 or later. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Logic circuits |
| General subdivision |
Design and construction |
| -- |
Data processing. |
| 9 (RLIN) |
26019 |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Logic design |
| General subdivision |
Data processing. |
| 9 (RLIN) |
26020 |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
VHDL (Computer hardware description language) |
| 9 (RLIN) |
26021 |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Vranesic, Zvonko G. |
| 9 (RLIN) |
26022 |
| Relator term |
author. |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE |
|---|
| Title of a work |
electrical and computer engineering |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Koha item type |
Books |
| Source of classification or shelving scheme |
Dewey Decimal Classification |