MARC details
| 000 -LEADER |
|---|
| fixed length control field |
02722cam a2200361 i 4500 |
| 001 - CONTROL NUMBER |
|---|
| control field |
16920994 |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
|---|
| control field |
20210222105657.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
110816s2012 nyua 001 0 eng |
| 010 ## - LIBRARY OF CONGRESS CONTROL NUMBER |
|---|
| LC control number |
2011033683 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9780073380698 (alk. paper) |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
0073380695 (alk. paper) |
| 040 ## - CATALOGING SOURCE |
|---|
| Original cataloging agency |
DLC |
| Transcribing agency |
DLC |
| Modifying agency |
DLC |
| Description conventions |
rda |
| 050 00 - LIBRARY OF CONGRESS CALL NUMBER |
|---|
| Classification number |
TK7868.D5 |
| Item number |
S253 2012 |
| 082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
621.392 |
| Edition number |
23 |
| Item number |
S.R.F |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
Sandige, Richard S. |
| Relator term |
author. |
| 245 10 - TITLE STATEMENT |
|---|
| Title |
Fundamentals of digital and computer design with VHDL / |
| Statement of responsibility, etc |
Richard S. Sandige, Michael L. Sandige. |
| 264 #1 - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
|---|
| Place of publication, distribution, etc |
New York : |
| Name of publisher, distributor, etc |
McGraw Hill, |
| Date of publication, distribution, etc |
[2012] |
| 264 #4 - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) |
|---|
| Date of publication, distribution, etc |
©2012 |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
xx, 716 pages : |
| Other physical details |
illustrations ; |
| Dimensions |
27 cm |
| 336 ## - CONTENT TYPE |
|---|
| Source |
rdacontent |
| Content type term |
text |
| 337 ## - MEDIA TYPE |
|---|
| Source |
rdamedia |
| Media type term |
unmediated |
| 338 ## - CARRIER TYPE |
|---|
| Source |
rdacarrier |
| Carrier type term |
volume |
| 500 ## - GENERAL NOTE |
|---|
| General note |
Includes index. |
| 505 0# - FORMATTED CONTENTS NOTE |
|---|
| Formatted contents note |
Chapter 1: Boolean Algebra, Boolean Functions, VHDL, and Gates -- Chapter 2: Number Conversions, Codes, and Function Minimization -- Chapter 3: Introduction to Logic Circuit Analysis and Design -- Chapter 4: Combinational Logic Circuit Design with VHDL -- Chapter 5: Bistable Memory Device Design with VHDL -- Chapter 6: Simple Finite State Machine Design with VHDL -- Chapter 7: Computer Circuits -- Chapter 8: Circuit Implementation Techniques -- Chapter 9: Complex Finite State Machine Design with VHDL -- Chapter 10: Basic Computer Architectures -- Chapter 11: Assembly Language Programming for VBC1 -- Chapter 12: Designing Input/Output Circuits -- Chapter 13: Designing Instruction Memory, Loading Program Counter, and Debounced Circuit -- Chapter 14: Designing Multiplexed Display Systems -- Chapter 15: Designing Instruction Decoders -- Chapter 16: Designing Arithmetic Logic Units -- Chapter 17: Completing the Design for VBC1 -- Chapter 18: Assembly Language Programming for VBC1-E -- Chapter 19: Designing Input/Output Circuits for VBC1-E -- Chapter 20: Designing the Data Memory Circuit for VBC1-E -- Chapter 21: Designing the Arithmetic, Logic, Shift, Rotate, and Unconditional Jump Circuits for VBC1-E -- Chapter 22: Designing a Circuit to Prevent Program Execution During Manual Loading for VBC1-E -- Chapter 23: Designing Extented Instruction Memory for VBC1-E -- Chapter 24: Designing the Software Interrupt Circuits for VBC1-E -- Chapter 25: Completing the Design for VBC1-E -- Appendices<br/> |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Digital electronics. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Electronic digital computers |
| General subdivision |
Design and construction |
| -- |
Data processing. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
VHDL (Computer hardware description language) |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Sandige, Michael L. |
| Relator term |
author. |
| 856 ## - ELECTRONIC LOCATION AND ACCESS |
|---|
| Materials specified |
Abstract |
| Uniform Resource Identifier |
<a href="http://repository.fue.edu.eg/xmlui/handle/123456789/3954">http://repository.fue.edu.eg/xmlui/handle/123456789/3954</a> |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Koha item type |
Books |
| Source of classification or shelving scheme |
Dewey Decimal Classification |