High performance parallelism pearls : multicore and many-core programming approaches / James Reinders, Jim Jeffers.

Electronic reproduction. Palo Alto, Calif. : ebrary, 2014. Available via World Wide Web. Access may be limited to ebrary affiliated libraries.

computer bookfair2016

Includes indexes.

Previously issued in print: 2014.

Front Cover; High Performance Parallelism Pearls: Multicore and Many-core Programming Approaches; Copyright; Contents; Contributors; Acknowledgments; Foreword; Humongous computing needs: Science years in the making; Open standards; Keen on many-core architecture; Xeon Phi is born: Many cores, excellent vector ISA ; Learn highly scalable parallel programming; Future demands grow: Programming models matter; Preface; Inspired by 61 cores: A new era in programming; Chapter 1: Introduction; Learning from successful experiences; Code modernization; Modernize with concurrent algorithms. Modernize with vectorization and data localityUnderstanding power usage; ISPC and OpenCL anyone?; Intel Xeon Phi coprocessor specific; Many-core, neo-heterogeneous; No "Xeon Phi" in the title, neo-heterogeneous programming; The future of many-core; Downloads; Chapter 2: From "Correct" to "Correct & Efficient": A Hydro2D Case Study with Godunov's Scheme; Scientific computing on contemporary computers; Modern computing environments; CEA's Hydro2D; A numerical method for shock hydrodynamics; Euler's equation; Godunov's method; Where it fits; Features of modern architectures. Performance-oriented architectureProgramming tools and runtimes; Our computing environments; Paths to performance; Running Hydro2D; Hydro2D's structure; Computation scheme; Data structures; Measuring performance; Optimizations; Memory usage; Thread-level parallelism; Arithmetic efficiency and instruction-level parallelism; Data-level parallelism; Summary; The coprocessor vs the processor; A rising tide lifts all boats; Performance strategies; Chapter 3: Better Concurrency and SIMD on HBM ; The application: HIROMB --
BOOS -Model; Key usage: DMI ; HBM execution profile. Overview for the optimization of HBM Data structures: Locality done right; Thread parallelism in HBM ; Data parallelism: SIMD vectorization; Trivial obstacles; Premature abstraction is the root of all evil; Results; Profiling details; Scaling on processor vs. coprocessor; Contiguous attribute; Summary; References; Chapter 4: Optimizing for Reacting Navier-Stokes Equations; Getting started; Version 1.0: Baseline; Version 2.0: ThreadBox ; Version 3.0: Stack memory; Version 4.0: Blocking; Version 5.0: Vectorization; Intel Xeon Phi coprocessor results; Summary. Chapter 5: Plesiochronous Phasing BarriersWhat can be done to improve the code?; What more can be done to improve the code?; Hyper-Thread Phalanx; What is nonoptimal about this strategy?; Coding the Hyper-Thread Phalanx; How to determine thread binding to core and HT within core?; The Hyper-Thread Phalanx hand-partitioning technique; A lesson learned; Back to work; Data alignment; Use aligned data when possible; Redundancy can be good for you; The plesiochronous phasing barrier; Let us do something to recover this wasted time; A few "left to the reader" possibilities.