Real-time embedded systems / Xiacong Fan.

Front Cover; Real-Time Embedded Systems: Design Principles and Engineering Practices; Copyright; Contents; Preface; Acknowledgments; Dedication; Acronyms; Part I: Introduction; Chapter 1: Introduction to Embedded and Real-Time Systems; 1.1 Embedded Systems; 1.2 Real-Time Systems; 1.2.1 Soft Real-Time Systems; 1.2.2 Hard Real-Time Systems; 1.2.3 Spectrum of Real-Time Systems; 1.3 Case Study: Radar System; Problems; Chapter 2: Cross-Platform Development; 2.1 Cross-Platform Development Process; 2.2 Hardware Architecture; 2.3 Software Development; 2.3.1 Software Design. 2.3.2 System Programming Language C/C++2.3.2.1 Declarations and definitions; 2.3.2.2 Scope regions; 2.3.2.3 Storage duration; 2.3.2.4 Linkage; 2.3.2.5 Storage-class specifiers; 2.3.3 Test Hardware-Independent Modules; 2.4 Build Target Images; 2.4.1 Cross-Development Toolchain; 2.4.1.1 Cross compiler/assembler; 2.4.1.2 Linker; 2.4.1.3 Dynamic linker; 2.4.2 Executable and Linking Format; 2.4.2.1 Linking view; 2.4.2.2 Execution view; 2.4.3 Memory Mapping; 2.4.4 Case Study: Building a QNX Image; 2.5 Transfer Executable File Object to Target; 2.6 Integrated Testing on Target; 2.7 System Production. ProblemsChapter 3: Microprocessor Primer; 3.1 Introduction to Microprocessors; 3.1.1 Commonly Used Microprocessors; 3.1.2 Microprocessor Characteristics; 3.1.2.1 Architectures; 3.1.2.2 Processing width; 3.1.2.3 I/O addressing; 3.1.2.4 Reset vector; 3.1.2.5 Endianness; 3.2 Microchip PIC18F8720; 3.2.1 Memory Organization; 3.2.2 Word Write Mode; 3.2.3 Byte Select Mode; 3.2.4 Byte Write Mode; 3.3 Intel 8086; 3.3.1 Memory Organization; 3.3.2 Separate I/O Address Space; 3.3.2.1 Timing clock; 3.3.2.2 External bus; 3.3.2.3 I/O device: UART; 3.3.3 Memory Address Space; 3.3.4 Wait States

3.4 Intel Pentium3.4.1 Bus State Transition; 3.4.2 Memory Organization; 3.5 ARM926EJ-S; 3.5.1 TCM Interface; Problems; Chapter 4: Interrupts; 4.1 Introduction to Interrupts; 4.2 External Interrupts; 4.2.1 Nonvectored Interrupting; 4.2.2 PIC and Vectored Interrupting; 4.2.2.1 Maskable interrupts; 4.2.2.2 Interrupt priorities; 4.2.2.3 Interrupt source mode; 4.2.2.4 Interrupt vectoring process; 4.3 Software Interrupts; 4.4 Internal Interrupts; 4.5 Design Patterns for ISRs; 4.5.1 General ISR Design Pattern; 4.5.2 ISR with a Server Task; 4.5.3 ISR Chaining; 4.5.4 ISR Cascading. 4.5.5 Data Sharing with ISRs4.6 Interrupt Response Time; 4.7 Case Study: x86; 4.7.1 Hardware Interrupts; 4.7.2 Put It All Together; 4.8 Case Study: ARM Processor; 4.8.1 Hardware Interrupts; 4.8.2 Put It All Together; Problems; Chapter 5: Embedded System Boot Process; 5.1 System Bootloader; 5.2 System Boot Process; 5.2.1 Load Embedded Software; 5.2.1.1 From host node; 5.2.1.2 From NVM on board; 5.2.2 Prepare Embedded Software for Execution; 5.2.2.1 Decode compressed ELF object; 5.2.2.2 Create executable image; 5.3 Case Study: AT91SAM9G45 Boot Process.