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CMOS analog circuit design / Phillip E. Allen, professor emeritus, Georgia Institute of Technology, Douglas R. Holberg, consultant.

By: Contributor(s): Material type: TextTextPublisher: New York : Oxford University Press, [2012]Edition: International third editionDescription: xv, 590 pages : illustrations ; 24 cmContent type:
  • text
Media type:
  • unmediated
Carrier type:
  • volume
ISBN:
  • 9780199937424 (pbk)
Subject(s): DDC classification:
  • 22 621.39732 A.P.C
LOC classification:
  • TK7874 .A428 2012
Contents:
1.1 ANALOG INTEGRATED CIRCUIT DESIGN ; 1.2 NOTATION, SYMBOLOGY AND TERMINOLOGY ; 1.3 ANALOG SIGNAL PROCESSING ; 1.4 EXAMPLE OF ANALOG VLSI MIXED-SIGNAL CIRCUIT DESIGN ; 2.1 BASIC MOS SEMICONDUCTOR FABRICATION PROCESSES ; 2.2 THE PN JUNCTION ; 2.3 THE MOS TRANSISTOR ; 2.4 PASSIVE COMPONENTS ; 2.5 OTHER CONSIDERATIONS OF CMOS TECHNOLOGY ; 3.1 SIMPLE MOS LARGE-SIGNAL MODEL (SPICE LEVEL 1) ; 3.2 OTHER MOS LARGE-SIGNAL MODEL PARAMETERS ; 3.3 SMALL-SIGNAL MODEL FOR THE MOS TRANSISTOR ; 3.4 COMPUTER SIMULATION MODELS ; 3.5 SUBTHRESHOLD MOS MODEL ; 3.6 SPICE SIMULATION OF MOS CIRCUITS ; 4.1 MOS SWITCH ; 4.2 MOS DIODE/ACTIVE RESISTOR ; 4.3 CURRENT SINKS AND SOURCES ; 4.4 CURRENT MIRRORS ; 4.5 CURRENT AND VOLTAGE REFERENCES ; 4.6 BANDGAP REFERENCE ; 5.1 INVERTERS ; 5.2 DIFFERENTIAL AMPLIFIERS ; 5.3 CASCODE AMPLIFIERS ; 5.4* CURRENT AMPLIFIERS ; 5.5* OUTPUT AMPLIFIERS/BUFFERS ; 6.1 DESIGN OF CMOS OP AMPS ; 6.2 COMPENSATION OF OP AMP ; 6.3 DESIGN OF TWO-STAGE OP AMPS ; 6.4 POWER-SUPPLY REJECTION RATIO OF TWO-STAGE OP AMPS ; 6.5 CASCODE OP AMPS ; 6.6 SIMULATION AND MEASUREMENT OF OP AMPS ; 6.7 MACROMODELS FOR OP AMPS ; 7.1 BUFFERED OP AMPS ; 7.2 HIGH-SPEED/FREQUENCY OP AMPS ; 7.3 DIFFERENTIAL-OUTPUT OP AMPS ; 7.4 MICROPOWER OP AMPS ; 7.5 LOW NOISE OP AMPS ; 7.6 LOW VOLTAGE OP AMPS ; 8.1 CHARACTERIZATION OF A COMPARATOR ; 8.2 TWO-STAGE, OPEN-LOOP COMPARATOR DESIGN ; 8.3 OTHER OPEN-LOOP COMPARATORS ; 8.4 IMPROVING THE PERFORMANCE OF OPEN-LOOP COMPARATORS ; 8.5 DISCRETE-TIME COMPARATORS ; 8.6 HIGH-SPEED COMPARATORS ; APPENDIX A CIRCUIT ANALYSIS FOR ANALOG CIRCUIT DESIGN ; APPENDIX B INTEGRATED CIRCUIT LAYOUT ; APPENDIX C CMOS DEVICE CHARACTERIZATION ; APPENDIX D TIME AND FREQUENCY DOMAIN RELATIONSHIP FOR SECOND-ORDER SYSTEMS
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Books Books Main library B3 Faculty of Engineering & Technology (Electrical) 621.39732 A.P.C (Browse shelf(Opens below)) Available 00013949

1.1 ANALOG INTEGRATED CIRCUIT DESIGN ; 1.2 NOTATION, SYMBOLOGY AND TERMINOLOGY ; 1.3 ANALOG SIGNAL PROCESSING ; 1.4 EXAMPLE OF ANALOG VLSI MIXED-SIGNAL CIRCUIT DESIGN ; 2.1 BASIC MOS SEMICONDUCTOR FABRICATION PROCESSES ; 2.2 THE PN JUNCTION ; 2.3 THE MOS TRANSISTOR ; 2.4 PASSIVE COMPONENTS ; 2.5 OTHER CONSIDERATIONS OF CMOS TECHNOLOGY ; 3.1 SIMPLE MOS LARGE-SIGNAL MODEL (SPICE LEVEL 1) ; 3.2 OTHER MOS LARGE-SIGNAL MODEL PARAMETERS ; 3.3 SMALL-SIGNAL MODEL FOR THE MOS TRANSISTOR ; 3.4 COMPUTER SIMULATION MODELS ; 3.5 SUBTHRESHOLD MOS MODEL ; 3.6 SPICE SIMULATION OF MOS CIRCUITS ; 4.1 MOS SWITCH ; 4.2 MOS DIODE/ACTIVE RESISTOR ; 4.3 CURRENT SINKS AND SOURCES ; 4.4 CURRENT MIRRORS ; 4.5 CURRENT AND VOLTAGE REFERENCES ; 4.6 BANDGAP REFERENCE ; 5.1 INVERTERS ; 5.2 DIFFERENTIAL AMPLIFIERS ; 5.3 CASCODE AMPLIFIERS ; 5.4* CURRENT AMPLIFIERS ; 5.5* OUTPUT AMPLIFIERS/BUFFERS ; 6.1 DESIGN OF CMOS OP AMPS ; 6.2 COMPENSATION OF OP AMP ; 6.3 DESIGN OF TWO-STAGE OP AMPS ; 6.4 POWER-SUPPLY REJECTION RATIO OF TWO-STAGE OP AMPS ; 6.5 CASCODE OP AMPS ; 6.6 SIMULATION AND MEASUREMENT OF OP AMPS ; 6.7 MACROMODELS FOR OP AMPS ; 7.1 BUFFERED OP AMPS ; 7.2 HIGH-SPEED/FREQUENCY OP AMPS ; 7.3 DIFFERENTIAL-OUTPUT OP AMPS ; 7.4 MICROPOWER OP AMPS ; 7.5 LOW NOISE OP AMPS ; 7.6 LOW VOLTAGE OP AMPS ; 8.1 CHARACTERIZATION OF A COMPARATOR ; 8.2 TWO-STAGE, OPEN-LOOP COMPARATOR DESIGN ; 8.3 OTHER OPEN-LOOP COMPARATORS ; 8.4 IMPROVING THE PERFORMANCE OF OPEN-LOOP COMPARATORS ; 8.5 DISCRETE-TIME COMPARATORS ; 8.6 HIGH-SPEED COMPARATORS ; APPENDIX A CIRCUIT ANALYSIS FOR ANALOG CIRCUIT DESIGN ; APPENDIX B INTEGRATED CIRCUIT LAYOUT ; APPENDIX C CMOS DEVICE CHARACTERIZATION ; APPENDIX D TIME AND FREQUENCY DOMAIN RELATIONSHIP FOR SECOND-ORDER SYSTEMS

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