000			01920cam a22003617i 4500
999			_c5594 _d5594
001			13786165
005			20210317142501.0
008			041118s2005 gw a f b 001 0 eng d
010			_a 2004116726
020			_a9788181288073
020			_a354020198x
040			_aOHX _cOHX _dOCLCQ _dBGU _dDLC _erda
082	0	0	_a621.395 _bC.G.V _222
100	1		_aCampardo, Giovanni. _eauthor.
245	1	0	_aVLSI-design of non-volatile memories / _cGiovanni Campardo, Rino Micheloni, David Novosel.
246	3	0	_aVery large scale integrated design of non-volatile memories
264		1	_aBerlin ; _aNew York : _bSpringer, _c[2005]
264		4	_c©2005
300			_axxviii, 581 pages : _billustrations ; _c24 cm
336			_2rdacontent _atext
337			_2rdamedia _aunmediated
338			_2rdacarrier _avolume
504			_aIncludes bibliographical references and index.
505	0		_aNon-Volatile Memory Design -- Process Aspects -- The MOSFET Transistor and the Memory Cell -- Passive Components -- Fundamental Circuit Blocks -- The Organization of the Memory Array -- The Input Buffer – Decoders – Boost -- Synchronization Circuits -- Reading Circuits -- Multilevel Read -- Program and Erase Algorithms -- Circuits Used in Program and Erase Operations -- High-Voltage Management System -- Program and Erase Controller -- Redundancy and Error Correction Codes -- The Output Buffer -- Test Modes -- ESD & Latch-Up -- From Specification Analysis to Floorplan Definition -- Photo Album
650		0	_aIntegrated circuits _xVery large scale integration.
700	1		_aMicheloni, Rino. _eauthor.
700	1		_aNovosel, David. _eauthor.
856	4	2	_3Publisher description _uhttp://www.loc.gov/catdir/enhancements/fy0662/2004116726-d.html
856	4	1	_3Table of contents only _uhttp://www.loc.gov/catdir/enhancements/fy0816/2004116726-t.html
942			_cBK _2ddc