VHDL coding styles and methodologies /
Cohen, Ben, 1945-,
VHDL coding styles and methodologies / Ben Cohen. - Second edition - xviii, 453 pages : illustrations ; 27 cm
"...an in-depth tutorial"--Cover. Includes index.
Preface -- VHDL Overview and Concepts -- Basic Language Elements -- Control Structures -- Drivers -- VHDL Timing -- Elements of Entity/Architecture -- Subprograms -- Packages -- User Defined Attributes, Specifications, and Configurations -- Design for Synthesis -- Functional Models and Testbenches -- UART Project -- Appendix A: VHDL 93 and VHDL 87 Syntax Summary -- Appendix B: Package Standard -- Appendix C: Package Textio -- Appendix D: STD_Logic_Textio -- Appendix E: Package STD_Logic_1164 -- Appendix F: Numeric_STD -- Appendix G: STD_Logic_Unsigned -- Appendix H: STD_Logic_Signed -- Appendix I: STD_Logic_Arith -- Appendix J: STD_Logic_Misc -- Appendix K: VHDL Predefined Attributes -- Index.
0792384741 (alk. paper)
99017750
VHDL (Computer hardware description language)
621.392 / C.B.V.
VHDL coding styles and methodologies / Ben Cohen. - Second edition - xviii, 453 pages : illustrations ; 27 cm
"...an in-depth tutorial"--Cover. Includes index.
Preface -- VHDL Overview and Concepts -- Basic Language Elements -- Control Structures -- Drivers -- VHDL Timing -- Elements of Entity/Architecture -- Subprograms -- Packages -- User Defined Attributes, Specifications, and Configurations -- Design for Synthesis -- Functional Models and Testbenches -- UART Project -- Appendix A: VHDL 93 and VHDL 87 Syntax Summary -- Appendix B: Package Standard -- Appendix C: Package Textio -- Appendix D: STD_Logic_Textio -- Appendix E: Package STD_Logic_1164 -- Appendix F: Numeric_STD -- Appendix G: STD_Logic_Unsigned -- Appendix H: STD_Logic_Signed -- Appendix I: STD_Logic_Arith -- Appendix J: STD_Logic_Misc -- Appendix K: VHDL Predefined Attributes -- Index.
0792384741 (alk. paper)
99017750
VHDL (Computer hardware description language)
621.392 / C.B.V.